As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
High current information handling system loads that include a CPU typically utilize multi-phase voltage regulators (VR's) that include multiple CPU core voltage (Vcore) phases that are coupled together to provide power via a first Vcore power rail to the main core of a CPU. In one case, a conventional VR may include six such Vcore phases. A power stage of each Vcore phase is usually composed of a MOSFET (metal oxide semiconductor field effect transistor) driver, a high-side MOSFET, a low-side MOSFET and an inductor with all the phase inductors being tied together at their output to the first power rail. One example of such a multi-phase VR architecture may be found in U.S. Pat. No. 7,999,520. A VR can also include a separate additional “VSA” rail coupled to provide power separately via a second VSA power rail to non-core circuitry of a CPU, such as oscillators, memory, etc. In such a case, a VR controller is coupled to simultaneously control each of the multiple Vcore phases and the additional VSA rail. In some cases, a multi-phase VR may include multiple Vmem power stages coupled to provide power separately via a third Vmem power rail to integrated memory controller circuitry of a CPU.
Each given one of the multiple Vcore phases of a multi-phase voltage regulator includes a DC/DC voltage regulation circuitry (or a Vcore regulator circuit) that includes inductor direct-current resistance (DCR) current sense circuitry that is used to sense a value of current drawn from the given VR phase by the main core of the CPU of an information handling system, and each VR phase provides this sensed Vcore current value to the CPU. The CPU in turn uses the sensed Vcore current of the multiple VR phases to determine the total amount of power being drawn by the CPU, and to compare this total CPU power consumption to maximum allowable CPU power limit so as to maintain maximum CPU performance without exceeding the maximum allowable CPU power limit. In this regard, the CPU will reduce CPU power consumption (together with CPU performance) when the actual CPU power consumption approaches the maximum allowable CPU power consumption value to keep actual the CPU power consumption from exceeding the maximum allowable value, and will increase the CPU power consumption (together with CPU performance) when the actual CPU power consumption drops below the maximum allowable CPU power consumption value so as to maximize CPU performance when possible.
In a conventional information handling system, accuracy of the current sense circuitry of the CPU Vcore regulator circuit has a large impact on system performance and reliability. In particular, when the magnitude of Vcore current is under-sensed this will impact the system reliability, and when the magnitude of CPU Vcore current is over-sensed this will impact the CPU performance. The accuracy of the current sense circuitry of the CPU Vcore regulator circuit depends on the tolerances of the inductor DCR and of the sense circuitry used. For example, a typical inductor DCR tolerance is +/−7%, and therefore the reported power consumption for a given CPU may be over-sensed as 200 Watts when it is actually only 185 Watts. Thus, if the CPU has a maximum allowable CPU power consumption value of 200 Watts, then the CPU may throttle back due to this over-sensed power consumption and adversely impact system performance. In an attempt to calibrate the CPU Vcore regulator circuit, previous methods have used a passive load turned on and off by a switch. However, this conventional calibration technique occurs at only one load point. Other conventional Vcore regulator circuit calibration techniques have used an external load coupled to the VR and calibration routines performed by a controller external to the VR, and have proposed using a controlled source connected to the output of the multiple VR phases. However, all of these conventional methods increase the solution cost and pose a safety risk since the VR phases are in open loop during calibration.